Network and Communication technology department

Address: Phòng 610, Nhà E3, 144 Xuân Thủy, Cầu Giấy, Hà Nội Phone: (024) 37547347

PGS.TS. TRẦN XUÂN TÚ
Manager

Email: tutx@vnu.edu.vn

The Research Department of Network and Communication Technology is a research, development and graduate training unit under the Institute of Information Technology, Vietnam National University, Hanoi. The Department of Network and Communication Technology currently has two research groups: (i) Digital Infrastructure Research Group; (ii) Smart Integrated Systems Research Group & AIoT. The main research directions include:

  • Connection Database Infrastructure
  • Embedded systems and applications of the Internet of Things (IoT)
  • System on chip, network on chip
  • Designing hardware for AI & IoT
  • Low power design
  • Security Hardware Design
  • FPGA/ASIC Technology

Besides scientific research, development and technology transfer activities, the Department of Network and Communication Technology also organizes training activities to foster scientific and technological capacity for partners, students. experts in the above areas of expertise. Research groups of the department also actively participate in professional association activities, organize international and national scientific conferences and seminars in the field of hardware and software co-design.

The Department of Network and Communication Technology has cooperated with research groups from domestic and foreign universities and science and technology organizations such as: University of Grenoble Alpes, CEA-Leti (France), University of Science and Technology. University of Technology Sydney (Australia), UC Davis University (USA), UEC University of Electronics and Communication, Aizu University (Japan), Military Technical Academy, Government Cipher Department (VN)… Besides, the research department also has close cooperation with enterprises such as: Toshiba (Japan), Synopsys, Global Foundry, Muse Semiconductor (USA), TSMC (Taiwan), FPT, VNPT Technology (VN)…< /p>

Team

  1. Dr. Tran Xuan Tu – Head of Department
  2. Dinh Van Dung
  3. Bui Duy Hieu
  4. Phan Dang Khoa
  5. Nguyen Ngo Doanh
  6. Tran Duc Manh
  7. Dong Pham Khoi – PhD student
  8. Nguyen Duy Anh – PhD student
  9. Dao Manh Hiep – PhD student
  10. Le Duc Vu – Trainee
  11. Dinh Quang Lam – Trainee
  12. Pham Tung Lam – Trainee
  13. Do Anh Duc – Trainee
  14. Nguyen The Anh – Trainee
  15. Nguyen Thi Van Anh – Trainee
  16. Nguyen Huy Hoang – Trainee
  17. Pham Hoang Long – Trainee

Team of collaborators

  1. Pham Cong Kha – University of Electro-Communications, Japan
  2. Francesca Iacopi – University of Technology Sydney, Australia
  3. Vincent Beroulle – University of Grenoble Alpes, France
  4. Ben Abdallah Abderazek – The University of Aizu, Japan
  5. Fawnizu Azmadi Hussin – Universiti Teknologi PETRONAS, Malaysia
  6. Dang Nam Khanh – The University of Aizu, Japan
  7. Pham Minh Trien – University of Technology
  8. Le Van Thanh Vu – Hue University
  9. Phan Hai Phong – Hue University
  10. Tran Dinh Lam – Military Institute of Science and Technology

Some outstanding science and technology projects

  1. Research and build a secure Internet of Things (Secu-IoT) platform

The goal of the project is to successfully research and develop hardware and software platforms for secure Internet of Things (IoT) systems based on FPGA technology. Including the following specific objectives: (i) Research and develop a secure hardware platform (system-on-chip and IoT devices) based on FPGA technology; (ii) Research and develop an embedded software platform for IoT devices and integrate IoT devices into the cloud computing platform to enable functions such as data collection, analysis and data processing. ; (iii) Develop demo application on smartphone platform to display to users through web interface or mobile app interface.

  1. Research, design and manufacture application data security chip in IoT and application device development (ADEN4IoT)

Currently, security for IoT applications is a hot topic in the world because of the importance and difficulty of implementing security strategies for IoT applications. Security for IoT involves various actors such as end devices, systems and transmission protocols, security of application and storage layer data, etc. IoT devices can also easily collected and modified by the bad guys. In addition, to optimize product costs, IoT devices are designed to be small devices with tight constraints on memory space and computing power. Therefore, security features have not been developed, especially security features with high throughput and low capacity. In this topic, we propose to study data security methods and security protocols based on the AES algorithm, an algorithm that has been standardized and is being selected as a data security algorithm. key data for recent IoT proposals.

In this project, we have mastered integrated IC design, simulation and verification technologies. We have successfully built a system-on-chip based on the open source Pulpino platform and built the design of an IoT-standard data security module for low-power IoT and e-government applications. The chip has been designed, implemented layout, ensured physical constraints and has been manufactured by TSMC on 65nm technology. Microchip optimization technologies to achieve low power have been studied and applied to the design. Several security chip threats with cached power consumption attacks have been analyzed.

Data security microchips for IoT and low power e-government applications were tested at Hoa Lac Hi-Tech Park. The system consists of 3 devices connected to each other via BLE protocol. The test device can collect air quality data such as PM 2.5, PM10, temperature, humidity and several wastewater criteria. The data is transmitted over the network in encrypted form and the secret key is changed every 30 minutes. Therefore, even if the attacker receives these encrypted data, he cannot decrypt or use attack methods to find the secret key. The data security chip has been tested and guaranteed to work according to the proposed criteria. Besides developing the hardware, the team has built APIs and drivers for the devices in the system. These libraries are designed to be ready for future use. A data security device can also be used to encrypt data on a computer through computer programming interfaces.

Through this topic, the team has mastered the technology of designing, simulating and verifying the IC, mastering the design execution process to be ready for manufacturing on 65nm CMOS technology. We believe that, with the results achieved, we can design and build more secure systems of the future for deeper application in applications that need high security.

  1. Research and development of dual-band transmitters for Internet-of-Things devices for agricultural applications (IOTA)

With this topic, the research team has proposed and developed a dual-band low-power transceiver. The two selected bands are the 2.4GHZ band for WiFi technology and the 1.8GHz band for cellular technology. The proposed design has data collection capabilities for IoT systems for agriculture. The optimization of power consumption allows the device to operate using solar energy or the device’s self-collected energy through other sources such as radio waves. As a result, IoT devices that draw energy by collecting from the environment can be deployed widely. Thanks to these devices that monitor the growth parameters of crops and livestock, farmers can adjust the conditions accordingly to increase crop and livestock productivity.

The figure shows the block diagram of the radio transceiver system. This is a complex system consisting of many components such as amplifiers, mixers and phase-tracking loops… Within the framework of the topic, the group has focused on research and implementation of power amplifier circuits. capacity (PA) for agricultural IoT dual-band transceivers. The power amplifier block is an important block in the radio transceiver system that directly affects the transmitting power of the device. In addition, the team has also implemented a power cut-off control block to save power consumption and energy during the time when the circuit is not working.

Some typical scientific works in the last 5 years

  • Duy-Anh Nguyen, Xuan-Tu Tran, Khanh N. Dang, Francesca Iacopi (2022). A low-power, high-accuracy with fully on-chip ternary weight hardware architecture for Deep Spiking Neural Networks. Microprocessors and Microsystems 90, 104458 (SCI, IF 1.525).
  • Marco Sarmiento, Khai-Duy Nguyen, Ckristian Duran, Trong-Thuc Hoang, Ronaldo Serrano, Xuan-Tu Tran, Koichiro Ishibashi, Cong-Kha Pham (2021). A Sub-μW Reversed-Body-Bias 8-bit Processor on 65-nm Silicon-On-Thin-Box (SOTB) for IoT Applications. IEEE Transactions on Circuits and Systems II: Express Briefs. (SCIE, IF 3.292, Q1)
  • Khanh N. Dang, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran (2021). HotCluster: A thermal-aware defect recovery method for Through-Silicon-Vias Towards Reliable 3-D ICs systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 40. ISSN: 0278-0070. (SCI, IF 2.168, Q2)
  • Duy-Anh Nguyen, Xuan-Tu Tran, Francesca Iacopi (2021). A Review of Algorithms and Hardware Implementations for Spiking Neural Networks. Journal of Low Power Electronics and Applications, Vol. 11(2), 23. ISSN: 2079-9268. (e-SCI, Q3)
  • Duy P. Nguyen, Xuan-Tu Tran, Anh V. Pham (2021). A wideband high dynamic range triple-stacked FET dual-shunt distributed analogue voltage controlled attenuator. IET Microwaves, Antennas & Propagation, ISSN: 1751-8725. (SCI, IF 1.972, Q1)
  • Khanh N. Dang, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran (2020) A thermal-aware on-line fault tolerance method for TSV lifetime reliability in 3D-NoC systems. IEEE Access, 8 . pp. 166642-166657. ISSN 2169-3536. (SCIE, IF 4.098, Q1)
  • Dinh-Lam Tran, Xuan-Tu Tran, Duy-Hieu Bui, Cong-Kha Pham (2020). An Efficient Hardware Implementation of Residual Data Binarization in HEVC CABAC Encoder. Electronics, vol. 9, issue 4, p. 684, April 2020. ISSN 2079-9292 (SCI, IF 2.397, Q1)
  • Khanh N. Dang, Michael Meyer, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran (2020). A non-blocking non-degrading multiple defects link testing method for 3D-Networks-on-Chip. IEEE Access, 8, pp. 59571-59589. ISSN 2169-3536 (SCIE, IF 4.098, Q1)
  • Duy Hieu Bui, Diego Puschini, Simone Bacles-Min, Edith Beigne, Xuan Tu Tran (2017). AES Datapath Optimization Strategies for Low-Power low-Energy Multi-security-level Internet-of-Thing Applications. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 25, Issue 12, December 2017, pp. 3281-3290. ISSN 1063-8210. (SCI, IF 1.946)

The Research Department of Network and Communication Technology is a research, development and graduate training unit under the Institute of Information Technology, Vietnam National University, Hanoi. The Department of Network and Communication Technology currently has two research groups: (i) Digital Infrastructure Research Group; (ii) Smart Integrated Systems Research Group & AIoT. The main research directions include:

  • Connection Database Infrastructure
  • Embedded systems and applications of the Internet of Things (IoT)
  • System on chip, network on chip
  • Designing hardware for AI & IoT
  • Low power design
  • Security Hardware Design
  • FPGA/ASIC Technology

Besides scientific research, development and technology transfer activities, the Department of Network and Communication Technology also organizes training activities to foster scientific and technological capacity for partners, students. experts in the above areas of expertise. Research groups of the department also actively participate in professional association activities, organize international and national scientific conferences and seminars in the field of hardware and software co-design.

The Department of Network and Communication Technology has cooperated with research groups from domestic and foreign universities and science and technology organizations such as: University of Grenoble Alpes, CEA-Leti (France), University of Science and Technology. University of Technology Sydney (Australia), UC Davis University (USA), UEC University of Electronics and Communication, Aizu University (Japan), Military Technical Academy, Government Cipher Department (VN)… Besides, the research department also has close cooperation with enterprises such as: Toshiba (Japan), Synopsys, Global Foundry, Muse Semiconductor (USA), TSMC (Taiwan), FPT, VNPT Technology (VN)…< /p>

Team

  1. Dr. Tran Xuan Tu – Head of Department
  2. Dinh Van Dung
  3. Bui Duy Hieu
  4. Phan Dang Khoa
  5. Nguyen Ngo Doanh
  6. Tran Duc Manh
  7. Dong Pham Khoi – PhD student
  8. Nguyen Duy Anh – PhD student
  9. Dao Manh Hiep – PhD student
  10. Le Duc Vu – Trainee
  11. Dinh Quang Lam – Trainee
  12. Pham Tung Lam – Trainee
  13. Do Anh Duc – Trainee
  14. Nguyen The Anh – Trainee
  15. Nguyen Thi Van Anh – Trainee
  16. Nguyen Huy Hoang – Trainee
  17. Pham Hoang Long – Trainee

Team of collaborators

  1. Pham Cong Kha – University of Electro-Communications, Japan
  2. Francesca Iacopi – University of Technology Sydney, Australia
  3. Vincent Beroulle – University of Grenoble Alpes, France
  4. Ben Abdallah Abderazek – The University of Aizu, Japan
  5. Fawnizu Azmadi Hussin – Universiti Teknologi PETRONAS, Malaysia
  6. Dang Nam Khanh – The University of Aizu, Japan
  7. Pham Minh Trien – University of Technology
  8. Le Van Thanh Vu – Hue University
  9. Phan Hai Phong – Hue University
  10. Tran Dinh Lam – Military Institute of Science and Technology

Some outstanding science and technology projects

  1. Research and build a secure Internet of Things (Secu-IoT) platform

The goal of the project is to successfully research and develop hardware and software platforms for secure Internet of Things (IoT) systems based on FPGA technology. Including the following specific objectives: (i) Research and develop a secure hardware platform (system-on-chip and IoT devices) based on FPGA technology; (ii) Research and develop an embedded software platform for IoT devices and integrate IoT devices into the cloud computing platform to enable functions such as data collection, analysis and data processing. ; (iii) Develop demo application on smartphone platform to display to users through web interface or mobile app interface.

  1. Research, design and manufacture application data security chip in IoT and application device development (ADEN4IoT)

Currently, security for IoT applications is a hot topic in the world because of the importance and difficulty of implementing security strategies for IoT applications. Security for IoT involves various actors such as end devices, systems and transmission protocols, security of application and storage layer data, etc. IoT devices can also easily collected and modified by the bad guys. In addition, to optimize product costs, IoT devices are designed to be small devices with tight constraints on memory space and computing power. Therefore, security features have not been developed, especially security features with high throughput and low capacity. In this topic, we propose to study data security methods and security protocols based on the AES algorithm, an algorithm that has been standardized and is being selected as a data security algorithm. key data for recent IoT proposals.

In this project, we have mastered integrated IC design, simulation and verification technologies. We have successfully built a system-on-chip based on the open source Pulpino platform and built the design of an IoT-standard data security module for low-power IoT and e-government applications. The chip has been designed, implemented layout, ensured physical constraints and has been manufactured by TSMC on 65nm technology. Microchip optimization technologies to achieve low power have been studied and applied to the design. Several security chip threats with cached power consumption attacks have been analyzed.

Data security microchips for IoT and low power e-government applications were tested at Hoa Lac Hi-Tech Park. The system consists of 3 devices connected to each other via BLE protocol. The test device can collect air quality data such as PM 2.5, PM10, temperature, humidity and several wastewater criteria. The data is transmitted over the network in encrypted form and the secret key is changed every 30 minutes. Therefore, even if the attacker receives these encrypted data, he cannot decrypt or use attack methods to find the secret key. The data security chip has been tested and guaranteed to work according to the proposed criteria. Besides developing the hardware, the team has built APIs and drivers for the devices in the system. These libraries are designed to be ready for future use. A data security device can also be used to encrypt data on a computer through computer programming interfaces.

Through this topic, the team has mastered the technology of designing, simulating and verifying the IC, mastering the design execution process to be ready for manufacturing on 65nm CMOS technology. We believe that, with the results achieved, we can design and build more secure systems of the future for deeper application in applications that need high security.

  1. Research and development of dual-band transmitters for Internet-of-Things devices for agricultural applications (IOTA)

With this topic, the research team has proposed and developed a dual-band low-power transceiver. The two selected bands are the 2.4GHZ band for WiFi technology and the 1.8GHz band for cellular technology. The proposed design has data collection capabilities for IoT systems for agriculture. The optimization of power consumption allows the device to operate using solar energy or the device’s self-collected energy through other sources such as radio waves. As a result, IoT devices that draw energy by collecting from the environment can be deployed widely. Thanks to these devices that monitor the growth parameters of crops and livestock, farmers can adjust the conditions accordingly to increase crop and livestock productivity.

The figure shows the block diagram of the radio transceiver system. This is a complex system consisting of many components such as amplifiers, mixers and phase-tracking loops… Within the framework of the topic, the group has focused on research and implementation of power amplifier circuits. capacity (PA) for agricultural IoT dual-band transceivers. The power amplifier block is an important block in the radio transceiver system that directly affects the transmitting power of the device. In addition, the team has also implemented a control block to cut off the power to save power consumption and energy during the time when the circuit is not working.

Some typical scientific works in the last 5 years

  • Duy-Anh Nguyen, Xuan-Tu Tran, Khanh N. Dang, Francesca Iacopi (2022). A low-power, high-accuracy with fully on-chip ternary weight hardware architecture for Deep Spiking Neural Networks. Microprocessors and Microsystems 90, 104458 (SCI, IF 1.525).
  • Marco Sarmiento, Khai-Duy Nguyen, Ckristian Duran, Trong-Thuc Hoang, Ronaldo Serrano, Xuan-Tu Tran, Koichiro Ishibashi, Cong-Kha Pham (2021). A Sub-μW Reversed-Body-Bias 8-bit Processor on 65-nm Silicon-On-Thin-Box (SOTB) for IoT Applications. IEEE Transactions on Circuits and Systems II: Express Briefs. (SCIE, IF 3.292, Q1)
  • Khanh N. Dang, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran (2021). HotCluster: A thermal-aware defect recovery method for Through-Silicon-Vias Towards Reliable 3-D ICs systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 40. ISSN: 0278-0070. (SCI, IF 2.168, Q2)
  • Duy-Anh Nguyen, Xuan-Tu Tran, Francesca Iacopi (2021). A Review of Algorithms and Hardware Implementations for Spiking Neural Networks. Journal of Low Power Electronics and Applications, Vol. 11(2), 23. ISSN: 2079-9268. (e-SCI, Q3)
  • Duy P. Nguyen, Xuan-Tu Tran, Anh V. Pham (2021). A wideband high dynamic range triple-stacked FET dual-shunt distributed analogue voltage controlled attenuator. IET Microwaves, Antennas & Propagation, ISSN: 1751-8725. (SCI, IF 1.972, Q1)
  • Khanh N. Dang, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran (2020) A thermal-aware on-line fault tolerance method for TSV lifetime reliability in 3D-NoC systems. IEEE Access, 8 . pp. 166642-166657. ISSN 2169-3536. (SCIE, IF 4.098, Q1)
  • Dinh-Lam Tran, Xuan-Tu Tran, Duy-Hieu Bui, Cong-Kha Pham (2020). An Efficient Hardware Implementation of Residual Data Binarization in HEVC CABAC Encoder. Electronics, vol. 9, issue 4, p. 684, April 2020. ISSN 2079-9292 (SCI, IF 2.397, Q1)
  • Khanh N. Dang, Michael Meyer, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran (2020). A non-blocking non-degrading multiple defects link testing method for 3D-Networks-on-Chip. IEEE Access, 8, pp. 59571-59589. ISSN 2169-3536 (SCIE, IF 4.098, Q1)
  • Duy Hieu Bui, Diego Puschini, Simone Bacles-Min, Edith Beigne, Xuan Tu Tran (2017). AES Datapath Optimization Strategies for Low-Power low-Energy Multi-security-level Internet-of-Thing Applications. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 25, Issue 12, December 2017, pp. 3281-3290. ISSN 1063-8210. (SCI, IF 1.946)